CNA, the Taiwanese news agency, has reported that NVIDIA has secured 50% of TSMC’s CoWoS (Chip on Wafer on Substrate) chip packaging capacity for the year 2025, despite TSMC ramping up production significantly in recent years.
CoWoS is a technology that allows multiple chips to be interconnected on a silicon wafer, a capability found in modern state-of-the-art manufacturing facilities, including Intel’s EMIB and Foveros technologies. In the past, NVIDIA has primarily utilized TSMC’s manufacturing facilities, with TSMC’s chip packaging business accounting for 7-9% of the company’s revenue.
On the other hand, Chey Tae-won, the chairman of SK Group, revealed in an interview that Jensen Huang, the CEO of NVIDIA, has requested SK Hynix to accelerate the delivery of HBM4 memory chips by 6 months, aiming for a faster delivery schedule in the second half of 2025. Currently, the memory chips for AI chips are mainly HBM3/HBM3E, with SK Hynix holding a significant market share and being a bottleneck in the delivery of AI chips.
Source – CNA.com.tw, Reuters
TLDR: NVIDIA secures 50% of TSMC’s CoWoS chip packaging capacity for 2025, while SK Hynix is urged to speed up delivery of HBM4 memory chips by NVIDIA CEO.
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