The TSMC management recently participated in the IEEE International Electron Devices Meeting, where they made a significant announcement regarding the development of 1.4-nanometer chips. This marks the first instance in which TSMC has discussed the creation of such chips.
During their presentation, TSMC highlighted the roadmap for chip development, specifically focusing on the N2 (2-nanometer) code name, which is expected to commence production in 2025. Additionally, they mentioned the A14 chip, which is set to be a 1.4-nanometer chip. However, the precise year of its production remains undisclosed, though it is speculated to begin at least by 2027-2028.
It is anticipated that the A14 chip will incorporate the Gate-All-Around FET (GAAFET) manufacturing technique, the same technology employed in the production of 3-nanometer and 2-nanometer chips. Moreover, TSMC may utilize High-NA EUV machinery to facilitate the manufacturing of extremely compact circuitry. It is worth noting that ASML, the leading provider of lithography machines, has a substantial waiting list extending several years into the future.
To summarize, TSMC made significant strides in their presentation at the IEEE International Electron Devices Meeting by unveiling their plans for the development of 1.4-nanometer chips. The introduction of the A14 chip, along with the utilization of advanced manufacturing techniques, highlights TSMC’s commitment to enhancing power, performance, area, cost, and time-to-market of their products.
TLDR: TSMC joined the IEEE International Electron Devices Meeting and revealed their plans for the development of 1.4-nanometer chips. The N2 chip is expected to begin production in 2025, while the A14 chip’s production timeline remains undisclosed. TSMC may adopt the GAAFET technique and High-NA EUV machinery for the manufacturing process. Overall, TSMC’s presentation showcased their dedication to improving power, performance, area, cost, and time-to-market metrics.
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